Title

Microprocessor-Based-Parallel Architecture Using Multiport-Memory Interconnection Networks

Document Type

Article

Publication Date

3-1-1999

Department

Computing

Abstract

Parallel computer interconnections based on multiport memories offer attractive alternatives to link-oriented or bus-oriented interconnection networks (ICNs) for the rapid prototyping of microprocessor-based parallel machines. This paper presents an overview of multiport memory ICNs. It focuses on the MemNet hypercube interconnection network, which uses overlapping groups of four-port memories. The network provides each of the N processing elements (PEs) with Concurrent Read Exclusive Write (CREW) access to log(4)N multiport memory modules. Along each of the cube's n dimensions, memory is shared with three other PEs for a connectivity of 3(n), where n = inverted right perpendicular log(4)N inverted left perpendicular.. High connectivity is achieved while requiring on the order of NlogN memories. Details of a one-dimensional four-processor system are described, including a basic multiprocessing laboratory outline.

Publication Title

Journal of Engineering Technology

Volume

16

Issue

1

First Page

24

Last Page

31